Micron MT41K256M16TW-107P Dram DDR3L 4 Gbit 256M x 16bit 933 MHz Fbga 96 Pins
- Differential bidirectional data strobe
- 8n-bit prefetch architecture
- Differential clock inputs
- 8 internal banks
- Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
- Programmable CAS (READ) latency (CL), programmable posted CAS additive latency (AL)
- Programmable CAS (WRITE) latency (CWL)
- Fixed burst length (BL) of 8 and burst chop (BC) of 4 (via the mode register set [MRS])
- Selectable BC4 or BL8 on-the-fly (OTF)
- Self refresh mode, self refresh temperature, automatic self refresh, write levelling
Other details
| Brand | MICRON |
| Part Number | MT41K256M16TW-107P |
| Quantity | Each |
| Technical Data Sheet EN |  |
All product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them. Image is for illustrative purposes only. Please refer to product description.
Micron MT41K256M16TW-107P Dram DDR3L 4 Gbit 256M x 16bit 933 MHz Fbga 96 Pins
- Differential bidirectional data strobe
- 8n-bit prefetch architecture
- Differential clock inputs
- 8 internal banks
- Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
- Programmable CAS (READ) latency (CL), programmable posted CAS additive latency (AL)
- Programmable CAS (WRITE) latency (CWL)
- Fixed burst length (BL) of 8 and burst chop (BC) of 4 (via the mode register set [MRS])
- Selectable BC4 or BL8 on-the-fly (OTF)
- Self refresh mode, self refresh temperature, automatic self refresh, write levelling
Other details
| Brand | MICRON |
| Part Number | MT41K256M16TW-107P |
| Quantity | Each |
| Technical Data Sheet EN | |
All product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them. Image is for illustrative purposes only. Please refer to product description.
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Description
- Differential bidirectional data strobe
- 8n-bit prefetch architecture
- Differential clock inputs
- 8 internal banks
- Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
- Programmable CAS (READ) latency (CL), programmable posted CAS additive latency (AL)
- Programmable CAS (WRITE) latency (CWL)
- Fixed burst length (BL) of 8 and burst chop (BC) of 4 (via the mode register set [MRS])
- Selectable BC4 or BL8 on-the-fly (OTF)
- Self refresh mode, self refresh temperature, automatic self refresh, write levelling
Other details
| Brand | MICRON |
| Part Number | MT41K256M16TW-107P |
| Quantity | Each |
| Technical Data Sheet EN | |
All product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them. Image is for illustrative purposes only. Please refer to product description.
